Question Intel Ultra 5 245K Hypervisor Error ARL029

[byte_corvus]

Guys, I've been hitting a wall with my current setup. My system keeps freezing on the Intel Ultra 5 245K whenever EPT (Extended Page Tables) is enabled. If I toggle EPT off, the issue vanishes, but obviously, that is not an ideal solution for anyone running a custom hypervisor or testing kernel-level drivers.

After digging through the documentation, I found this erratum:

ARL029
Incorrect Core TLB Entry May be Retrieved Following VM Exit

Problem:
An incorrect Core TLB entry may be retrieved when the retrieval is not completed prior to VM exit.

Implication:
Due to this erratum, hypervisor software may read an invalid value following VM exit, leading to Windows Bug Check HYPERVISOR_ERROR (20001h) or SECURE_KERNEL_ERROR (18Bh).

Workaround:
It may be possible for the BIOS to workaround this erratum.

Currently, the only confirmed fix I have is waiting for a BIOS update, but we all know how long those take to actually address microcode errata for newer CPUs. Has anyone else run into this specific bug while devving their own hypervisor or testing DMA setups on these newer Intel chips?

1. Has anyone managed a software-level patch for this rather than waiting for the mobo vendor?
2. Are there specific TLB flushing sequences you use to mitigate this post-VM exit?
3. Is there any way to manually hook the VM exit to clear the entry before it hits the hypervisor?

Curious to hear if anyone has a cleaner workaround or if I should just shelf this chip for testing until the microcode is fixed.